https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118480
--- Comment #13 from Segher Boessenkool <segher at gcc dot gnu.org> ---
(In reply to Segher Boessenkool from comment #9)
> Both vsl and vslo actually look only at the right-most byte in the shift
> amount argument (bits 125..127 resp. bits 121..124). In original AltiVec it
> was required to hold the same value in every lane, but that isn't true since
> arch 2.03 anymore. (See the PEM for the original stuff!)
>
> The current rs6000 stuff will work correctly for ancient CPUs as well.
>
> And the 970 actually has exactly the oldest VMX implementation!
>
> So I wonder what we actually require there (and then if we want to change
> things!)
Hrm, even the newest ISA requires all shift amount bytes to hold the same
value,
for vsl . But it is not as clear in the newer arch versions (even ignoring all
the character set issues, where for example is uses a lowercase closed sigma
for
assignments ("σ"), not the most readable).
On ancient CPUs vsl was actually implemented by exactly what now is called
"vslv", which works just fine if you have the same shift amount in every byte
lane ;-) (The vslv insn has almost the same opcode as vsl btw).
