https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121227
Bug ID: 121227
Summary: dot_prodv16siv64qi uses unsupported insn
Product: gcc
Version: 16.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: rguenth at gcc dot gnu.org
Target Milestone: ---
I see
> /spc/abuild/rguenther/obj-gcc-g/gcc/xgcc
> -B/spc/abuild/rguenther/obj-gcc-g/gcc/
> /space/rguenther/src/gcc/gcc/testsuite/gcc.target/i386/vnni-auto-vectorize-2.c
> -fdiagnostics-plain-output -O2 -mavx512vnni -mavx512vl -lm -o
> ./vnni-auto-vectorize-2.exe -fdump-tree-vect-details -fdump-tree-optimized
> -da
In file included from
/space/rguenther/src/gcc/gcc/testsuite/gcc.target/i386/vnni-auto-vectorize-2.c:11:
/space/rguenther/src/gcc/gcc/testsuite/gcc.target/i386/vnni-auto-vectorize-1.c:
In function ‘usdot_prod_qi’:
/space/rguenther/src/gcc/gcc/testsuite/gcc.target/i386/vnni-auto-vectorize-1.c:30:1:
error: unrecognizable insn:
(insn 55 54 56 6 (set (reg:V32HI 172)
(sign_extend:V32HI (reg:V32QI 176))) -1
(nil))
during RTL pass: vregs
when forcing a AVX512 mode as the first vector mode to try.
We then expand to unsupported (no AVX512BW):
;; _73 = DOT_PROD_EXPR <vect__6.83_67, _70, _72>;
(insn 33 32 35 (set (reg:V32QI 151 [ _75 ])
(vec_select:V32QI (reg:V64QI 114 [ _69 ])
(parallel [
(const_int 0 [0])
(const_int 1 [0x1])
(const_int 2 [0x2])
(const_int 3 [0x3])
(const_int 4 [0x4])
(const_int 5 [0x5])
(const_int 6 [0x6])
(const_int 7 [0x7])
(const_int 8 [0x8])
(const_int 9 [0x9])
(const_int 10 [0xa])
(const_int 11 [0xb])
(const_int 12 [0xc])
(const_int 13 [0xd])
(const_int 14 [0xe])
(const_int 15 [0xf])
(const_int 16 [0x10])
(const_int 17 [0x11])
(const_int 18 [0x12])
(const_int 19 [0x13])
(const_int 20 [0x14])
(const_int 21 [0x15])
(const_int 22 [0x16])
(const_int 23 [0x17])
(const_int 24 [0x18])
(const_int 25 [0x19])
(const_int 26 [0x1a])
(const_int 27 [0x1b])
(const_int 28 [0x1c])
(const_int 29 [0x1d])
(const_int 30 [0x1e])
(const_int 31 [0x1f])
]))) -1
(nil))
(insn 35 33 34 (set (reg:SI 157)
(const_int -2139062144 [0xffffffff80808080])) -1
(nil))
(insn 34 35 36 (set (reg:V8SI 156)
(vec_duplicate:V8SI (reg:SI 157))) 9220 {*avx512vl_vec_dup_gprv8si}
(nil))
(insn 36 34 37 (set (reg:V16HI 155)
(subreg:V16HI (reg:V8SI 156) 0)) -1
(nil))
(insn 37 36 38 (set (reg:V32QI 154)
(subreg:V32QI (reg:V16HI 155) 0)) -1
(nil))
(insn 38 37 39 (set (reg:V32QI 153)
(reg:V32QI 154)) -1
(expr_list:REG_EQUAL (const_vector:V32QI [
(const_int -128 [0xffffffffffffff80]) repeated x32
])
(nil)))
(insn 39 38 40 (set (reg:V32QI 152 [ _62 ])
(plus:V32QI (reg:V32QI 151 [ _75 ])
(reg:V32QI 153))) -1
(nil))
(insn 40 39 42 (set (reg:V32QI 158 [ _63 ])
(vec_select:V32QI (reg:V64QI 114 [ _69 ])
(parallel [
(const_int 32 [0x20])
(const_int 33 [0x21])
(const_int 34 [0x22])
(const_int 35 [0x23])
(const_int 36 [0x24])
(const_int 37 [0x25])
(const_int 38 [0x26])
(const_int 39 [0x27])
(const_int 40 [0x28])
(const_int 41 [0x29])
(const_int 42 [0x2a])
(const_int 43 [0x2b])
(const_int 44 [0x2c])
(const_int 45 [0x2d])
(const_int 46 [0x2e])
(const_int 47 [0x2f])
(const_int 48 [0x30])
(const_int 49 [0x31])
(const_int 50 [0x32])
(const_int 51 [0x33])
(const_int 52 [0x34])
(const_int 53 [0x35])
(const_int 54 [0x36])
(const_int 55 [0x37])
(const_int 56 [0x38])
(const_int 57 [0x39])
(const_int 58 [0x3a])
(const_int 59 [0x3b])
(const_int 60 [0x3c])
(const_int 61 [0x3d])
(const_int 62 [0x3e])
(const_int 63 [0x3f])
]))) -1
(nil))
(insn 42 40 41 (set (reg:SI 164)
(const_int -2139062144 [0xffffffff80808080])) -1
(nil))
(insn 41 42 43 (set (reg:V8SI 163)
(vec_duplicate:V8SI (reg:SI 164))) 9220 {*avx512vl_vec_dup_gprv8si}
(nil))
(insn 43 41 44 (set (reg:V16HI 162)
(subreg:V16HI (reg:V8SI 163) 0)) -1
(nil))
(insn 44 43 45 (set (reg:V32QI 161)
(subreg:V32QI (reg:V16HI 162) 0)) -1
(nil))
(insn 45 44 46 (set (reg:V32QI 160)
(reg:V32QI 161)) -1
(expr_list:REG_EQUAL (const_vector:V32QI [
(const_int -128 [0xffffffffffffff80]) repeated x32
])
(nil)))
(insn 46 45 47 (set (reg:V32QI 159 [ _65 ])
(plus:V32QI (reg:V32QI 158 [ _63 ])
(reg:V32QI 160))) -1
(nil))
(insn 47 46 48 (set (reg:V16SI 165)
(vec_concat:V16SI (subreg:V8SI (reg:V32QI 152 [ _62 ]) 0)
(subreg:V8SI (reg:V32QI 159 [ _65 ]) 0))) -1
(nil))
(insn 48 47 50 (set (reg:V64QI 150 [ _70 ])
(subreg:V64QI (reg:V16SI 165) 0)) -1
(nil))
(insn 50 48 49 (set (reg:SI 171)
(const_int 1077952576 [0x40404040])) -1
(nil))
(insn 49 50 51 (set (reg:V16SI 170)
(vec_duplicate:V16SI (reg:SI 171))) 9218 {*avx512f_vec_dup_gprv16si}
(nil))
(insn 51 49 52 (set (reg:V32HI 169)
(subreg:V32HI (reg:V16SI 170) 0)) -1
(nil))
(insn 52 51 53 (set (reg:V64QI 168)
(subreg:V64QI (reg:V32HI 169) 0)) -1
(nil))
(insn 53 52 54 (set (reg:V64QI 167)
(reg:V64QI 168)) -1
(expr_list:REG_EQUAL (const_vector:V64QI [
(const_int 64 [0x40]) repeated x64
])
(nil)))
(insn 54 53 55 (set (reg:V32QI 176)
(vec_select:V32QI (reg:V64QI 112 [ vect__6.83 ])
(parallel [
(const_int 0 [0])
(const_int 1 [0x1])
(const_int 2 [0x2])
(const_int 3 [0x3])
(const_int 4 [0x4])
(const_int 5 [0x5])
(const_int 6 [0x6])
(const_int 7 [0x7])
(const_int 8 [0x8])
(const_int 9 [0x9])
(const_int 10 [0xa])
(const_int 11 [0xb])
(const_int 12 [0xc])
(const_int 13 [0xd])
(const_int 14 [0xe])
(const_int 15 [0xf])
(const_int 16 [0x10])
(const_int 17 [0x11])
(const_int 18 [0x12])
(const_int 19 [0x13])
(const_int 20 [0x14])
(const_int 21 [0x15])
(const_int 22 [0x16])
(const_int 23 [0x17])
(const_int 24 [0x18])
(const_int 25 [0x19])
(const_int 26 [0x1a])
(const_int 27 [0x1b])
(const_int 28 [0x1c])
(const_int 29 [0x1d])
(const_int 30 [0x1e])
(const_int 31 [0x1f])
]))) -1
(nil))
(insn 55 54 56 (set (reg:V32HI 172)
(sign_extend:V32HI (reg:V32QI 176))) -1
(nil))
...
