https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121192

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|                            |needs-bisection

--- Comment #3 from Richard Biener <rguenth at gcc dot gnu.org> ---
So vector lowering does the straight-forward component-based operation.  At
-O0 we do not have the { -1, -1 } condition constant propagated and thus
it isn't folded.  We turn

  VEC_COND_EXPR <_1, { 0, 0 }, { 4294967295, 4294967295 }>

into

  _9 = BIT_FIELD_REF <_1, 32, 0>;
  _10 = _9 != 0;
  _11 = _10 ? 0 : 4294967295;

and the COND_EXPR is what gets simplified wrongly.

unsigned int __GIMPLE (ssa,startwith("forwprop"))
foo (int a)
{
  _Bool c;
  unsigned int _1;

  __BB(2):
  c_3 = a_2(D) != 0;
  _1 = c_3 ? 0u : 4294967295u;
  return _1;

}

turns into (with -O -fgimple), triggering the same patterns:

  <bb 2> :
  _5 = a_2(D) == 0;
  _6 = (unsigned int) _5;
  _1 = -_6;
  return _1;


Hmm, but that's all correct.  Also the sparc veclower case - so it must
go wrong on the RTL side, possibly because of dead SSA defs?

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