[Bug target/121062] integer registers of vector constant load shouldn't go through memory

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121062

--- Comment #6 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by H.J. Lu <h...@gcc.gnu.org>:

https://gcc.gnu.org/g:11f73c82f178beb9f3f29cbfe2e0a5e592e40b69

commit r16-2305-g11f73c82f178beb9f3f29cbfe2e0a5e592e40b69
Author: Uros Bizjak <ubiz...@gmail.com>
Date:   Tue Jul 15 05:05:10 2025 +0800

    x86: Convert MMX integer loads from constant vector pool

    For MMX 16-bit, 32-bit and 64-bit constant vector loads from constant
    vector pool:

    (insn 6 2 7 2 (set (reg:V1SI 5 di)
            (mem/u/c:V1SI (symbol_ref/u:DI ("*.LC0") [flags 0x2]) [0  S4 A32]))
"pr121062-2.c":10:3 2036 {*movv1si_internal}
         (expr_list:REG_EQUAL (const_vector:V1SI [
                    (const_int -1 [0xffffffffffffffff])
                ])
            (nil)))

    we can convert it to

    (insn 12 2 7 2 (set (reg:SI 5 di)
            (const_int -1 [0xffffffffffffffff])) "pr121062-2.c":10:3 100
{*movsi_internal}
         (nil))

    Co-Developed-by: H.J. Lu <hjl.to...@gmail.com>

    gcc/

            PR target/121062
            * config/i386/i386.cc (ix86_convert_const_vector_to_integer):
            Handle E_V1SImode and E_V1DImode.
            * config/i386/mmx.md (V_16_32_64): Add V1SI, V2BF and V1DI.
            (mmxinsnmode): Add V1DI and V1SI.
            Add V_16_32_64 splitter for constant vector loads from constant
            vector pool.
            (V_16_32_64:*mov<mode>_imm): Moved after V_16_32_64 splitter.
            Replace lowpart_subreg with adjust_address.

    gcc/testsuite/

            PR target/121062
            * gcc.target/i386/pr121062-1.c: New test.
            * gcc.target/i386/pr121062-2.c: Likewise.
            * gcc.target/i386/pr121062-3a.c: Likewise.
            * gcc.target/i386/pr121062-3b.c: Likewise.
            * gcc.target/i386/pr121062-3c.c: Likewise.
            * gcc.target/i386/pr121062-4.c: Likewise.
            * gcc.target/i386/pr121062-5.c: Likewise.
            * gcc.target/i386/pr121062-6.c: Likewise.
            * gcc.target/i386/pr121062-7.c: Likewise.