[Bug target/120297] [15/16 Regression] RISC-V: Miscompile at -O3

[rdapp at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120297

--- Comment #6 from Robin Dapp <rdapp at gcc dot gnu.org> ---
I was able to reproduce it on our internal tree.  Disabling scheduling as well
as using the simple vsetvl strategy make the problem disappear so everything
points to a vsetvl issue.