https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120999
Bug ID: 120999
Summary: Assembler warning about MOVPRFX generation for NBSL
instructions
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Keywords: aarch64-sve
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: ktkachov at gcc dot gnu.org
Target Milestone: ---
Target: aarch64
When using the NBSL SVE2 instruction to generate a NOR operation GCC falls
afoul of the MOVPRFX restrictions and gas warns about it:
#include <arm_sve.h>
#define NOR(x, y) (~((x) | (y)))
svuint64_t nor_z(svuint64_t c, svuint64_t a, svuint64_t b) { return NOR(a, b);
}
Compiled -O2 -march=armv9-a generates:
movprfx z0, z1
nbsl z0.d, z0.d, z2.d, z0.d
ret
which gives a warning during assembly:
Warning: output register of preceding `movprfx' used as input at operand 4 --
`nbsl z0.d,z0.d,z2.d,z0.d'
The architecture does have text about this in its description of the MOVPRFX
rules for NBSL:
The destination register must not refer to architectural register state
referenced by any other source operand register of this instruction.
I'm not sure if that means the semantics of the instruction are unpredictable
or if it's a problem in practice
