[Bug rtl-optimization/120983] recog violates earlyclobber with user-defined hard register before reload (causing ICE on gcc.target/loongarch/bitwise-shift-reassoc-clobber.c)

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120983

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
So the problem is before reload only the predicates are used and not the
constraints. The early clobbered is never looked at.

I wonder why IRA could not generate a reload here though since it could push
(reg:SI 23 $r23 [ x ]) into its own register for the last operand ...