https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101882
--- Comment #24 from Segher Boessenkool <segher at gcc dot gnu.org> ---
(In reply to Xi Ruoyao from comment #21)
> (In reply to Segher Boessenkool from comment #20)
> > (In reply to Peter Bergner from comment #17)
> > > The reason operands 0, 1 and 4 all use the register r23, is that each
> > > operand is using the same pseudo, coming from variable "x", which is a
> > > user
> > > defined hard register:
> > >
> > > register long x asm ("s0");
> >
> > So, user error.
>
> The user cannot anticipate what the RTL will become like after optimization
> passes at all.
What? No. The user can assume that (barring errors in the compiler) the
compiler will at any point have an instruction stream that faithfully
implements what the input code expressed.
And if the input is non-sensical, the compiler output will be as well, or the
compiler can give up in some cases.
> So it means the user just *cannot* use defined hard register in the code at
> all, as long as the machine description has an earlyclobber? That would
> just seem insane.
If the user requires multiple values to be held in the same hard register
at the same time, the compiler will not be able to do that.
> Or would we need to add the checks like
> https://gcc.gnu.org/pipermail/gcc-patches/2025-July/688634.html for every
> insn having an earlyclobber? That would seem insane too IMO.
Such things are never needed. But it appears we have a bug somewhere.
