https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120946
Bug ID: 120946
Summary: GCC emits compressed instruction with .option arch, -c
Product: gcc
Version: 15.1.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: mr.bossman075 at gmail dot com
Target Milestone: ---
GCC version 15.1.0 emits compressed instructions in inline-assembly and
assembly when option `.option arch, -c` is present. Interestingly `.option
norvc` works correctly still. Version 14.3.0 works as expected. The
assembler(2.44) given with the 15.1.0 toolchain which also emits the expected
instructions, even though assembling the same file with gcc emits unexpected
instructions.
```
riscv64-linux-as example.s -c -o example.o && riscv64-linux-objdump -d
example.o
riscv64-linux-gcc example.s -c -o example.o && riscv64-linux-objdump -d
example.o
```
Here is the toolchain used:
https://www.kernel.org/pub/tools/crosstool/files/bin/x86_64/15.1.0/x86_64-gcc-15.1.0-nolibc-riscv64-linux.tar.xz
An example on godbolt
https://godbolt.org/z/8hMe5cjfc
```
#include <stddef.h>
void example(void) {
void *ptr = NULL;
unsigned long value = 0;
asm volatile(
" .option push\n"
" .option arch, -c\n"
" sw %0, 0(%1)\n"
" .option pop\n"
: : "r" (value), "r" (ptr) : "memory");
}
```
or
```
.option arch, +c
example:
li a5, 0
.option push
.option arch, -c
sw a5, 0(a5)
.option pop
ret
```
Expected result:
GCC 14.3.0:
```
0: 4781 li a5,0
2: 00f7a023 sw a5,0(a5)
6: 8082 ret
```
Unexpected result:
GCC 15.1.0:
```
0: 4781 li a5,0
2: c39c sw a5,0(a5)
4: 8082 ret
```
