[Bug target/120930] [16 Regression] RISC-V: Miscompile at -O[23] with zvl256b -mrvv-vector-bits=zvl since r16-1645-g309dbcea2ca

[rguenth at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120930

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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           Keywords|                            |wrong-code
   Target Milestone|---                         |16.0
             Target|                            |riscv