https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120895
--- Comment #25 from Jakub Jelinek <jakub at gcc dot gnu.org> --- You're wrong. See https://godbolt.org/z/36eGehvTW for details. All of gcc 13.4, 14.3 and 15.1 say alignof (__m512) is 16 (if AVX is disabled), 32 (if AVX enabled but AVX512F is not) and 64 if AVX512F is enabled. If you ask for __alignof__ and alignof of typedef float __m1024 __attribute__ ((__vector_size__ (128), __may_alias__)); you'll also get __alignof__ 128 but alignof 16, 32 or 64 depending on enabled options. 128-byte vectors are always emulated right now on x86_64, before AVX was introduced, even 32-byte and 64-byte vectors were always emulated and largest alignment was 128 bits. With AVX introduction that changed to 256 bits if AVX is enabled, etc. alignof shouldn't change just because some future chip implements 128-byte vectors, but only when users choose to enable the corresponding ISA.
