https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113027
--- Comment #2 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The trunk branch has been updated by Richard Sandiford <rsand...@gcc.gnu.org>: https://gcc.gnu.org/g:a63b97e918b8592d0f6af94c5355efc82a49e06d commit r16-1537-ga63b97e918b8592d0f6af94c5355efc82a49e06d Author: Richard Sandiford <richard.sandif...@arm.com> Date: Tue Jun 17 11:43:51 2025 +0100 aarch64: Add vec_set/extract for tuple modes [PR113027] We generated inefficient code for bitfield references to Advanced SIMD structure modes. In RTL, these modes are just extra-long vectors, and so inserting and extracting an element is simply a vec_set or vec_extract operation. For the record, I don't think these modes should ever become fully fledged vector modes. We shouldn't provide add, etc. for them. But vec_set and vec_extract are the vector equivalent of insv and extv. From that point of view, they seem closer to moves than to arithmetic. gcc/ PR target/113027 * config/aarch64/aarch64-protos.h (aarch64_decompose_vec_struct_index): Declare. * config/aarch64/aarch64.cc (aarch64_decompose_vec_struct_index): New function. * config/aarch64/iterators.md (VEL, Vel): Add Advanced SIMD structure modes. * config/aarch64/aarch64-simd.md (vec_set<VSTRUCT_QD:mode>) (vec_extract<VSTRUCT_QD:mode>): New patterns. gcc/testsuite/ PR target/113027 * gcc.target/aarch64/pr113027-1.c: New test. * gcc.target/aarch64/pr113027-2.c: Likewise. * gcc.target/aarch64/pr113027-3.c: Likewise. * gcc.target/aarch64/pr113027-4.c: Likewise. * gcc.target/aarch64/pr113027-5.c: Likewise. * gcc.target/aarch64/pr113027-6.c: Likewise. * gcc.target/aarch64/pr113027-7.c: Likewise.
