[Bug tree-optimization/120523] New: gcc.dg/tree-ssa/cswtch-6.c fails on aarch64

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120523

            Bug ID: 120523
           Summary: gcc.dg/tree-ssa/cswtch-6.c fails on aarch64
           Product: gcc
           Version: 16.0
            Status: UNCONFIRMED
          Keywords: testsuite-fail
          Severity: normal
          Priority: P3
         Component: tree-optimization
          Assignee: pinskia at gcc dot gnu.org
          Reporter: pinskia at gcc dot gnu.org
  Target Milestone: ---
            Target: aarch64

So this fails on aarch64, since the decl has an alignment of 64 but the mode of
the decl/array type is TImode which has size of 128.

So the following check in mergeable_constant_section fails:
```
  if (HAVE_GAS_SHF_MERGE && flag_merge_constants
      && mode != VOIDmode
      && mode != BLKmode
      && known_le (GET_MODE_BITSIZE (mode), align)
      && align >= 8
      && align <= 256
      && (align & (align - 1)) == 0)
```

One way of fixing this is to force the alignment of the decl to the same as
bitsize of the mode of the array type if not BLKmode and it is less than the
current alignment.
This is inside switch_conversion::build_one_array where the decl is created.