[Bug target/17245] [3.3/3.4 regression] ICE compiling gsl-1.5 statistics/lag1.c

Fri, 08 Oct 2004 06:41:51 -0700 

------- Additional Comments From cvs-commit at gcc dot gnu dot org  2004-10-08 13:41 
-------
Subject: Bug 17245

CVSROOT:        /cvs/gcc
Module name:    gcc
Branch:         gcc-3_4-branch
Changes by:     [EMAIL PROTECTED]       2004-10-08 13:41:30

Modified files:
        gcc            : ChangeLog 
        gcc/config/sparc: sparc.c 
        gcc/testsuite  : ChangeLog 
Added files:
        gcc/testsuite/gcc.dg: ultrasp11.c 

Log message:
        PR target/17245
        * config/sparc/sparc.c (input_operand): Remove redundant code
        for handling LO_SUM.
        (legitimate_address_p) <REG+REG>: Do not recheck TARGET_V9.
        <LO_SUM>: If LO_SUM is offsettable, accept it for TFmode on V9.
        Otherwise only accept it for TFmode if quad move insns are available.

Patches:
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.diff?cvsroot=gcc&only_with_tag=gcc-3_4-branch&r1=2.2326.2.649&r2=2.2326.2.650
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/sparc/sparc.c.diff?cvsroot=gcc&only_with_tag=gcc-3_4-branch&r1=1.271.4.20&r2=1.271.4.21
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/testsuite/ChangeLog.diff?cvsroot=gcc&only_with_tag=gcc-3_4-branch&r1=1.3389.2.278&r2=1.3389.2.279
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/testsuite/gcc.dg/ultrasp11.c.diff?cvsroot=gcc&only_with_tag=gcc-3_4-branch&r1=NONE&r2=1.1.2.1



-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=17245

Reply via email to