https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114932
--- Comment #25 from Tianyang Chou <tianyang.chou at gmail dot com> ---
(In reply to Tamar Christina from comment #0)
Hi Tamar,
After reading the whole discussion, I still confused about how does the
immediate offset mode generated, can you help me understanding the logic chain
of the optimization?
What am I understand is: before optimized, gcc generate an register offset
mode, your patch allows CHREC multiply to be folded in IVOPT pass, that means
the addressing calculation process get simplified, but what's the relation
between this simplification and generated immediate offset mode? How does this
CHREC multiply folding optimization causes the generation of immediate offset
ldr step by step?
Hope you can provide me the basic train of thought from your optimization
to the generation of immediate offset load/store instructions. Many thanks!
