https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119362
--- Comment #1 from John David Anglin <danglin at gcc dot gnu.org> --- Created attachment 60856 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=60856&action=edit ira-costs.cc patch to fix build on PA 1.x The hunk of code disabled in the attached patch was added in commit e355fe414aa3aaf215c7dd9dd789ce217a1b458c. Probably, the reg equiv processing doesn't skip the init insns and they can contain insns with reg equivs. This results in the invalid insn on PA. The new invariant handling made this more likely. Only short 5-bit register offsets are valid before reload is completed on PA 1.x since that's all that is supported for both integer and floating point loads and stores. REG+D PLUS substitutions with invalid displacments are not consumed and regno_equiv_gains[regno] needs to be reduced by ira_register_move_cost[mode][rclass][rclass] to prevent these equivs from being used.
