https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119373
--- Comment #3 from Paul-Antoine Arras <parras at gcc dot gnu.org> --- Comment on attachment 60822 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=60822 Excerpt of the RISC-V assembly $ riscv64-linux-gnu-gcc -S -fverbose-asm -Ofast -mabi=lp64d -march=rv64gcv_zvl256b_zba_zbb_zbs_zicond -mrvv-vector-bits=zvl unroll.c -o unroll.riscv64.s