https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118984
--- Comment #15 from Maxim Egorushkin <maxim.yegorushkin at gmail dot com> --- (In reply to Maxim Egorushkin from comment #14) > (In reply to Andrew Pinski from comment #6) > > > It happens more often with vector instructions/registers due to the > > different "modes" of the registers that it can hold (subregs). > > One simple fix could be a special cast to treat an xmm register with > multiple elements as a register with one low element without copying. E.g. > `_mm_cvtsd_f64` generates `vmovq`, I need a version of this function which > generates no instruction but rather treats the __v2df xmm register as a > plain double. And a vice versa cast - treat a `double` in an xmm register as > a __v2df xmm register without a cast, while assuming the higher bits > undefined. Like a 64-bit value in a GP register is treated as a 32-bit value without any extra register moves. One assembly instruction uses rax register, the next uses eax register without any unnecessary register moves from rax to eax to zero out the higher bits of eax, since the 32-bit instructions ignore the higher bits and zero them out in the 32-bit register result anyway. Why this existing and well-working approach for treating a GP register as a 8/16/32/64-bit register without emitting any register move instructions isn't used for 256-bit ymm registers being treated as 128/64-bit registers without any extra register moves, please?
