https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114516
--- Comment #2 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Robin Dapp <rd...@gcc.gnu.org>: https://gcc.gnu.org/g:6be1b9e94d9a2ead15e3625e833f1e34503ab803 commit r15-7688-g6be1b9e94d9a2ead15e3625e833f1e34503ab803 Author: Robin Dapp <rd...@ventanamicro.com> Date: Fri Feb 21 17:08:16 2025 +0100 RISC-V: Include pattern stmts for dynamic LMUL computation [PR114516]. When scanning for program points, i.e. vector statements, we're missing pattern statements. In PR114516 this becomes obvious as we choose LMUL=8 assuming there are only three statements but the divmod pattern adds another three. Those push us beyond four registers so we need to switch to LMUL=4. This patch adds pattern statements to the program points which helps calculate a better register pressure estimate. PR target/114516 gcc/ChangeLog: * config/riscv/riscv-vector-costs.cc (compute_estimated_lmul): Add pattern statements to program points. gcc/testsuite/ChangeLog: * gcc.dg/vect/costmodel/riscv/rvv/pr114516.c: New test.
