[Bug target/118945] RISC-V: VSETL pass: Don't promote Vectors ops from Tail agnostic to Tail Undisturbed

[vineetg at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118945

--- Comment #4 from Vineet Gupta <vineetg at gcc dot gnu.org> ---
The following hack does prevent the fusion

+  inline bool tail_policy_eq2_p (const vsetvl_info &prev,
+                                const vsetvl_info &next)
+  {
+    return (((prev.get_policy_demand () == policy_demand_type::ignore_policy)
+             || (next.get_policy_demand () ==
policy_demand_type::ignore_policy))
+            && tail_policy_eq_p (prev, next));
+  }


-DEF_POLICY_RULE (tail_policy_only, ignore_policy, tail_policy_only,
always_true,
+DEF_POLICY_RULE (tail_policy_only, ignore_policy, tail_policy_only,
tail_policy_eq2_p,


-DEF_POLICY_RULE (ignore_policy, tail_policy_only, tail_policy_only,
always_true,
+DEF_POLICY_RULE (ignore_policy, tail_policy_only, tail_policy_only,
tail_policy_eq2_p,

although the ta mf2 might not be desirable.

test:
        ble     a1,zero,.L4
        vsetvli a5,zero,e32,m2,ta,ma
        vmv.v.i v2,0
.L3:
        vsetvli a5,a1,e8,mf2,ta,ma
        vle32.v v4,0(a0)
        sub     a1,a1,a5
        vsetvli zero,zero,e32,m2,tu,ma
        sh2add  a0,a5,a0
        vadd.vv v2,v2,v4