https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118402
--- Comment #1 from Jonathan Wakely <redi at gcc dot gnu.org> ---
The code comments say:
2. A great deal of attention has been paid to avoid cache line thrashing
by flattening the tree structure into cache-line sized arrays, that
are indexed in an efficient way.
but the actual array is:
enum class __barrier_phase_t : unsigned char { };
using __tickets_t = std::array<__barrier_phase_t, 64>;
struct alignas(64) /* naturally-align the heap state */ __state_t
{
alignas(__phase_alignment) __tickets_t __tickets;
};
This assumes that the cacheline size is 64, rather than using the constants
defined for that purpose. Maybe that's OK, so that we aren't affected by any
potential changes to the interference size constants on the command line.
In any case, if we change the phase type from 1-byte to __platform_wait_t then
we'd want the ticket array to have 64/sizeof(__barrier_phase_t) elements if we
want to keep it within a cacheline.
