[Bug target/118026] RISC-V Vector Intrinsic "__riscv_vfwadd_wv_f64m2_tu" generates redundant vmv instructions

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118026

--- Comment #3 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Andrew Pinski from comment #2)
> There are 2 issues with the source (I will file the not unswitching loop
> seperately).

Filed the unswitching loops issue as PR 118037.