https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117974
--- Comment #1 from Vineet Gupta <vineetg at gcc dot gnu.org> ---
So the way things seem to work here are in cprop_hardreg (just before vsetvl)
we have following:
(insn 44 18 47 4 (set (reg:DI 15 a5 [orig:139 _31 ] [139])
(unspec:DI [
(reg:DI 11 a1 [orig:138 ivtmp_29 ] [138])
(const_int 8 [0x8])
(const_int 6 [0x6])
(const_int 2 [0x2]) repeated x2
] UNSPEC_VSETVL)) 3724 {vsetvldi_no_side_effects}
(nil))
(insn 47 44 23 4 (set (reg:DI 14 a4 [orig:144 ivtmp_24 ] [144])
(ashift:DI (reg:DI 15 a5 [orig:139 _31 ] [139])
(const_int 2 [0x2]))) {ashldi3}
(nil))
(jump_insn 23 47 90 4 (set (pc)
(if_then_else (ne (reg:DI 11 a1 [orig:138 ivtmp_29 ] [138])
(const_int 0 [0]))
(label_ref:DI 79)
(pc))) 369 {*branchdi}
(int_list:REG_BR_PROB 955630228 (nil))
-> 79)
(code_label 79 110 51 7 9 (nil) [1 uses])
(insn 45 51 49 7 (set (reg:RVVM1SF 98 v2 [orig:135 vect__4.8 ] [135])
(if_then_else:RVVM1SF (unspec:RVVMF32BI [
(const_vector:RVVMF32BI [
(const_int 1 [0x1]) repeated x8
])
(reg:DI 15 a5 [orig:139 _31 ] [139])
(const_int 2 [0x2]) repeated x2
(const_int 0 [0])
(reg:SI 66 vl)
(reg:SI 67 vtype)
] UNSPEC_VPREDICATE)
(mem:RVVM1SF (reg/v/f:DI 10 a0 [orig:141 q ] [141]) [1 S32 A32])
(unspec:RVVM1SF [
(reg:DI 0 zero)
] UNSPEC_VUNDEF))) {*pred_movrvvm1sf}
(expr_list:REG_DEAD (reg:DI 0 zero)
(nil)))
insn 44 is a "promordial" vsetvl while insn 45 is the vector store.
The first vsetvl pass does is split all insns (does it really need to, given it
runs so late anyways).
The splitter define_insn_and_split "@vsetvl<mode>_no_side_effects" deletes
vsetvl insn 44 and generates vsetvl insn 117.
And then goes off to insert yet another vsetvl (insn 124) just before the VLE.
And I'm guessing the fusion/merge logic merges the later VSETVL into former,
but crossing the BEQ.
Following run is with --param=vsetvl-strategy=simple to whats going on
vsetvli a5,a1,e8,mf4,ta,ma # 117 Splitting with (vector.md:1776) <--
# deleting insn with uid = 44.
# generated in loop2_unroll)
slli a4,a5,2 # 47
beq a1,zero,.L12 # 23
vsetvli zero,a5,e32,m1,ta,ma # 124 Insert vsetvl before insn 45 <--
vle32.v v2,0(a0) # 45
I'm really confused, here
1. Does VSETVL need to do unconditional split_all_insns ()
2. I don't see how @vsetvl<mode>_no_side_effects is w/o side effects, it seems
to be populating VL_REGNUM and VTYPE_REGTYPE - is this a relic of the past ?
