https://gcc.gnu.org/bugzilla/show_bug.cgi?id=36503
--- Comment #15 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Uros Bizjak <u...@gcc.gnu.org>: https://gcc.gnu.org/g:093584abb854559393e36cd4cdcf9dc4862dd046 commit r15-5731-g093584abb854559393e36cd4cdcf9dc4862dd046 Author: Uros Bizjak <ubiz...@gmail.com> Date: Wed Nov 27 20:45:25 2024 +0100 i386: x86 can use x >> y for x >> 32+y [PR36503] x86 targets mask 32-bit shifts with a 5-bit mask (and 64-bit with 6-bit mask), so they can use x >> y instead of x >> 32+y. The optimization converts: leal 32(%rsi), %ecx sall %cl, %eax to: sall %cl, %eax PR target/36503 gcc/ChangeLog: * config/i386/i386.md (*ashl<mode>3_add): New define_insn_and_split pattern. (*ashl<mode>3_add_1): Ditto. (*<insn><mode>3_add): Ditto. (*<insn><mode>3_add_1): Ditto. (*ashl<mode>3_sub): Rename from *ashl<mode>3_negcnt. (*ashl<mode>3_sub_1): Rename from *ashl<mode>3_negcnt_1. (*<insn><mode>3_sub): Rename from *<insn><mode>3_negcnt. (*<insn><mode>3_sub_1): Rename from *<insn><mode>3_negcnt_1. gcc/testsuite/ChangeLog: * gcc.target/i386/pr36503-3.c: New test. * gcc.target/i386/pr36503-4.c: New test.