https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117573
--- Comment #4 from Tarik Ibrahimović <tarik.ibrahimo...@chili-chips.xyz> ---
Hi,
I'm hereby providing a testcase for the reported bug.
The bug is that there is a full-word misaligned store to address 0x1517 when
compiler optimizations are used (-02 in specific). In case of no compiler
optimizations there is no misalignment in memory accesses. Instruction causing
the misaligned access is on address 0x42c in the provided disassembly file.
Be careful, this instruction is first executed without making any misalignment
exceptions, only the second time does it introduce a misalignment issue. Though
this bug is not proved simulating the code in an ISS simulator, this behavior
has been verified in two RISC-V CPUs.
GCC Version details:
Using built-in specs.
COLLECT_GCC=riscv64-unknown-elf-gcc
COLLECT_LTO_WRAPPER=/opt/riscv/libexec/gcc/riscv64-unknown-elf/14.2.0/lto-wrapper
Target: riscv64-unknown-elf
Configured with:
/home/tibrahimovic/0.git-repo/riscv-gnu-toolchain/gcc/configure
--target=riscv64-unknown-elf --prefix=/opt/riscv --disable-shared
--disable-threads --enable-languages=c,c++ --with-pkgversion=g04696df0963
--with-system-zlib --enable-tls --with-newlib
--with-sysroot=/opt/riscv/riscv64-unknown-elf
--with-native-system-header-dir=/include --disable-libmudflap --disable-libssp
--disable-libquadmath --disable-libgomp --disable-nls
--disable-tm-clone-registry --src=.././gcc --disable-multilib --with-abi=lp64d
--with-arch=rv64imafdc --with-tune=rocket --with-isa-spec=20191213
'CFLAGS_FOR_TARGET=-Os -mcmodel=medlow' 'CXXFLAGS_FOR_TARGET=-Os
-mcmodel=medlow'
Thread model: single
Supported LTO compression algorithms: zlib
gcc version 14.2.0 (g04696df0963)
Exact command run for compilation:
riscv64-unknown-elf-gcc \
-DTCM=1 -DHARVARD=1 \
-march=rv32i \
-mabi=ilp32 \
-mstrict-align \
-mcmodel=medlow \
-Wl,--relax,-Bstatic,-T,$(SW_BLD)/main.lds,-Map,$(SW_BLD)/main.map \
\
-ffreestanding \
-fno-builtin \
-mrelax \
-fno-pic \
-nostdlib \
-static \
-Winline \
-Wno-implicit-int -Wno-implicit-function-declaration \
-g \
-fverbose-asm \
-o $(SW_BLD)/main.elf \
-O2 \
\
$(SW_SRC)/boot_crt.S \
$(SW_APP)/soc.c \
$(SW_APP)/memtest.c \
$(SW_APP)/uart.c \
$(SW_APP)/dac.c \
$(SW_APP)/adc.c \
$(SW_APP)/dhry.h \
$(SW_APP)/dhry_1.c $(SW_APP)/dhry_2.c -lgcc
Due to the unawareness of where the bug begins, I'm concatenating all .i
preprocessed files in one and presenting them here. I also included the
disassembly which causes the error.
