[Bug target/117292] [15 Regression] ICE: in aarch64_output_simd_imm, at config/aarch64/aarch64.cc:25422 at -Os

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117292

--- Comment #5 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Wilco Dijkstra <wi...@gcc.gnu.org>:

https://gcc.gnu.org/g:7c17058eac3834fb03ec9e518235e4192557b97d

commit r15-4678-g7c17058eac3834fb03ec9e518235e4192557b97d
Author: Wilco Dijkstra <wilco.dijks...@arm.com>
Date:   Fri Oct 25 14:53:58 2024 +0000

    AArch64: Add more accurate constraint [PR117292]

    As shown in the PR, reload may only check the constraint in some cases and
    and not check the predicate is still valid for the resulting instruction.
    To fix the issue, add a new constraint which matches the predicate exactly.

    gcc/ChangeLog:
            PR target/117292
            * config/aarch64/aarch64-simd.md (xor<mode>3<vczle><vczbe>): Use
            'De' constraint.
            * config/aarch64/constraints.md (De): Add new constraint.

    gcc/testsuite/ChangeLog:
            PR target/117292
            * gcc.target/aarch64/sve/single_5.c: Remove xfails.
            * gcc.target/aarch64/pr117292.c: New test.