[Bug target/117283] [RISC-V] Miscompilation triggered by `__riscv_vsseg7e32_v_i32m1x7`, GCC 14.2.0 at `-O1`, `-O2`, `-O3`, and `-Os`.

[yibohe at pku dot edu.cn via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117283

--- Comment #1 from Yibo He <yibohe at pku dot edu.cn> ---
The data initialization is long, because I find that this bug is triggered when
long data input. If anyone has a better submission format for code like this,
please let me know.