https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117238
--- Comment #3 from John David Anglin <danglin at gcc dot gnu.org> --- Not quite. As things currently stand, it's theoretically possible to hold up to two OI mode values in registers. As far as I can tell, it doesn't seem possible to handle SUBREG spills in pa_emit_move_sequence. There is some code to replace a SUBREG with equivalent memory. But with LRA, the MEM always seems to be NULL. This code was effectively disabled with legacy reload as pa_secondary_reload returns NO_REGS when it is passed rclass GENERAL_REGS and a SUBREG. Thus, it appears LRA has to handle SUBREG spills itself. I tried revising PA_HARD_REGNO_MODE_OK so OImode isn't allowed. This seems to help but it looks as if I may also have to drop TImode on this target.
