https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117111
--- Comment #6 from Oleg Endo <olegendo at gcc dot gnu.org> --- (In reply to Jeffrey A. Law from comment #5) > reorg splits insns because doing so gives more opportunities to fill delay > slot, particularly when the asm-output step would generate multiple > instructions for a single insn. > > My recollection (and it's been decades since I've really worked on reorg) is > that validity is checked dynamically when we try to fill the slot with a > particular insn. In theory the insns created by splitting should be no > different than insns that were in the insn chain prior to reorg. What the split pattern in question does is basically: ;; movt r2 -> movt r2 ;; movt r13 mov r2,r13 The split and change happens on the 2nd insn. It looks for a previous insn that does a "movt -> reg" within the current BB and if found replaces the operand. This changes the insn inter-dependency. Before the change the two insns depend on T_REG and can be reordered. After the change the 2nd insn depends on the 1st and must not be reordered -- which is what seems to be going wrong here.
