https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117126
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Keywords| |missed-optimization
Severity|normal |enhancement
--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
>GCC 14 generates redundant move-to-self instructions
They are not exactly move-to-self instructions, they zero out the upper half
64bit of the SSE registers.
This is expected as you need to zero out the upper half of the SSE registers
otherwise you might get some traps/fp exceptions (due to NaNs).
Use -fno-trapping-math if you don't want that behavior and you will see the
movqs are gone.
Though I wonder if the backend could do a slightly better job of tracking where
the zeroing of the upper half is needed.
