https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116956
Tamar Christina <tnfchris at gcc dot gnu.org> changed:
What |Removed |Added
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CC| |tnfchris at gcc dot gnu.org
--- Comment #2 from Tamar Christina <tnfchris at gcc dot gnu.org> ---
The code in vect_analyze_loop_1 seems to indicate that epilogue loops can't
fail analysis.
Presumably because the original code assumes that the main and epilog loops
were are being analyzed for the same ISA?
In this case the main loop is Adv. SIMD and the epilogue is SVE.
I'm not sure why it's fatal though.. why must epiloque analysis always succeed
even for a mode which didn't succeed for the main loop? e.g. in this case
VNx16QI fails for the main loop as well:
note: vect_is_simple_use: vectype vector([4,4]) <signed-boolean:4>
missed: not vectorized: relevant stmt not supported: patt_113 = _60 ^ 1;
It's weird that the analysis thinks it can't invert the mask.. that's a
separate issue that I'll look into as well.
But the main reason for the ice is that the accesses in the DR has a
non-constant step:
Creating dr for *_8
analyze_innermost: Applying pattern match.pd:5184, generic-match-9.cc:4041
Applying pattern match.pd:236, generic-match-3.cc:3751
success.
base_address: u.0_27
offset from base address: 0
constant offset from base address: 0
step: (ssizetype) (stride.5_19 * 4)
base alignment: 4
base misalignment: 0
offset alignment: 128
step alignment: 4
base_object: MEM[(real(kind=4) *)u.0_27]
Access function 0: {0B, +, (sizetype) (stride.5_19 * 4)}_1
but we get to vect_analyze_data_ref_access with STMT_VINFO_STRIDED_P not set.
It looks like the strided access handling code is missing handling for masked
loads.
Mine.
