https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212
--- Comment #345 from Kazumoto Kojima <kkojima at gcc dot gnu.org> --- (In reply to Oleg Endo from comment #341) > Do you have any idea how that might work? The only thing I can think of > right now is to remove R0 from list of allocatable registers and add an RTL > pass before RA which will insert "pseudo -> R0" before R0 constrained insns > and "R0 -> pseudo" after constrained insns. I think this should be almost > bullet-proof, but at the expense of potentially losing one register (R0). No, I don't have any specific idea, though I was envisioning the approach what you suggested.
