[Bug target/116822] [15 regression] RISC-V: ICE in compute_nregs_for_mode, at config/riscv/riscv-vector-costs.cc

[rguenth at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116822

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
     Ever confirmed|0                           |1
           Keywords|                            |ice-on-valid-code
   Last reconfirmed|                            |2024-09-26
             Status|UNCONFIRMED                 |NEW

--- Comment #3 from Richard Biener <rguenth at gcc dot gnu.org> ---
Confirmed.

#1  0x0000000001838a1f in riscv_vector::compute_nregs_for_mode (
    loop_vinfo=0x4bf5b90, mode=E_SImode, biggest_mode=E_HImode, lmul=8)
    at
/space/rguenther/src/gcc-autopar_devel/gcc/config/riscv/riscv-vector-costs.cc:457
457       gcc_assert (biggest_size >= mode_size);

and the caller processes an INTEGER_CST "var" with SImode. 
compute_local_live_ranges happily processes the '1' in

ivtmp_379 = ivtmp_381 - 1;

but this shouldn't be the issue with somehow computing a wrong biggest_mode.

But I don't feel like debugging this mess of risc-v code.  The patch results
in more load/store-lanes to be used which should be good.