https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115372
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Ever confirmed|0 |1
Last reconfirmed| |2024-09-20
See Also| |https://gcc.gnu.org/bugzill
| |a/show_bug.cgi?id=116583
CC| |rsandifo at gcc dot gnu.org
Status|UNCONFIRMED |NEW
--- Comment #4 from Richard Biener <rguenth at gcc dot gnu.org> ---
I'm quite sure we didn't use SLP before r15-812-gc71886f2ca2 but the dump scan
was changed from expecting 1 instead of 2 times "vectorizing stmts using SLP".
We do end up vectorizing gcc.dg/vect/pr97428.c with load/store-lanes but
somehow
fail to see that store-lanes is valid with SLP and the 16 lane store.
We're using vec_mask_len_load_lanes<RVVM1x8DF><RVVM1DF> for the loads when
not using SLP but as well fail to find an array mode for RVVM1DF[16] and
use classical pow2 store interleaving (it generates awkward code). We
try with the same store interleaving scheme for SLP but fail to handle the
node 0x5a92170 (max_nunits=1, refcnt=1) vector([2,2]) double
op: VEC_PERM_EXPR
{ }
lane permutation { 0[0] 1[0] }
children 0x5a91168 0x5a90f08
node 0x5a91168 (max_nunits=2, refcnt=3) vector([2,2]) double
permutes on the store side - see PR116583 for a similar issue on the load
side though this (interleave even/odd) should be possibly easier to handle?
Btw, the gcc.target/riscv/rvv/autovec/struct/struct_vect-?.c tests are
just very fragile because they have -funroll-all-loops. Currently I see
the following for rv64gcv on linux:
FAIL: gcc.target/riscv/rvv/autovec/struct/struct_vect-1.c scan-assembler-times
vsseg4e8\\.v 4
FAIL: gcc.target/riscv/rvv/autovec/struct/struct_vect-2.c scan-assembler-times
vsseg4e16\\.v 4
FAIL: gcc.target/riscv/rvv/autovec/struct/struct_vect-2.c scan-assembler-times
vsseg7e16\\.v 2
FAIL: gcc.target/riscv/rvv/autovec/struct/struct_vect-3.c scan-assembler-times
vsseg4e32\\.v 4
FAIL: gcc.target/riscv/rvv/autovec/struct/struct_vect-4.c scan-assembler-times
vsseg3e64\\.v 8
FAIL: gcc.target/riscv/rvv/autovec/struct/struct_vect-4.c scan-assembler-times
vsseg4e64\\.v 4
FAIL: gcc.target/riscv/rvv/autovec/struct/struct_vect-4.c scan-assembler-times
vsseg5e64\\.v 4
FAIL: gcc.target/riscv/rvv/autovec/struct/struct_vect-4.c scan-assembler-times
vsseg7e64\\.v 4
FAIL: gcc.target/riscv/rvv/autovec/struct/struct_vect-5.c scan-assembler-times
vsseg4e32\\.v 4
