https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212
--- Comment #195 from Oleg Endo <olegendo at gcc dot gnu.org> ---
(In reply to Kazumoto Kojima from comment #193)
Great results!
>
> It looks that LRA allocates r4 to the psuedo register r2854 and assumes that
> it's preserved beyond the insn 1752 block_lump_real_i4.
> Can the SH's sfunc pattern like block_lump_real_i4 confuse RA?
Are any other backends defining the patterns like that? Maybe something in
RA/LRA doesn't pay attention to the clobber in the parallel ....
It looks a bit strange ...
(define_insn "block_lump_real_i4"
[(parallel [(set (mem:BLK (reg:SI R4_REG))
(mem:BLK (reg:SI R5_REG)))
(use (match_operand:SI 0 "arith_reg_operand" "r,r"))
(use (match_operand 1 "" "Z,Ccl"))
(use (reg:SI R6_REG))
(clobber (reg:SI PR_REG))
(clobber (reg:SI T_REG))
(clobber (reg:SI R4_REG))
(clobber (reg:SI R5_REG))
(clobber (reg:SI R6_REG))
(clobber (reg:SI R0_REG))
(clobber (reg:SI R1_REG))
(clobber (reg:SI R2_REG))
(clobber (reg:SI R3_REG))])]
Why is this not written like other patterns
(define_insn "block_lump_real_i4"
[(set (mem:BLK (reg:SI R4_REG))
(mem:BLK (reg:SI R5_REG)))
(use (match_operand:SI 0 "arith_reg_operand" "r,r"))
(use (match_operand 1 "" "Z,Ccl"))
(use (reg:SI R6_REG))
(clobber (reg:SI PR_REG))
(clobber (reg:SI T_REG))
(clobber (reg:SI R4_REG))
(clobber (reg:SI R5_REG))
(clobber (reg:SI R6_REG))
(clobber (reg:SI R0_REG))
(clobber (reg:SI R1_REG))
(clobber (reg:SI R2_REG))
(clobber (reg:SI R3_REG))
...
???
