https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116448
Bug ID: 116448
Summary: gcc.target/arm/vfp-1.c uses the wrong instructions on
Cortex-M55
Product: gcc
Version: 13.3.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: azoff at gcc dot gnu.org
Target Milestone: ---
The gcc.target/arm/vfp-1.c fails with:
FAIL: gcc.target/arm/vfp-1.c scan-assembler vmla.f32
FAIL: gcc.target/arm/vfp-1.c scan-assembler vnmls.f32
FAIL: gcc.target/arm/vfp-1.c scan-assembler vmls.f32
FAIL: gcc.target/arm/vfp-1.c scan-assembler vnmla.f32
The instructions generated for Cortex-M55 is with -mfpu=fpv5-d16:
vldr.32 s15, [r3, #4]
vldr.32 s14, [r3, #8]
vnmul.f32 s15, s15, s14
vstr.32 s15, [r3]
vldr.32 s15, [r3, #4]
vldr.32 s13, [r3, #8]
vldr.32 s14, [r3]
vmul.f32 s15, s15, s13
vadd.f32 s15, s15, s14
vstr.32 s15, [r3]
vldr.32 s15, [r3, #4]
vldr.32 s13, [r3, #8]
vldr.32 s14, [r3]
vmul.f32 s15, s15, s13
vsub.f32 s15, s15, s14
vstr.32 s15, [r3]
vldr.32 s15, [r3, #4]
vldr.32 s14, [r3, #8]
vldr.32 s13, [r3]
vmul.f32 s14, s14, s13
vsub.f32 s15, s15, s14
vstr.32 s15, [r3]
vldr.32 s15, [r3, #4]
vldr.32 s13, [r3, #8]
vldr.32 s14, [r3]
vnmul.f32 s15, s15, s13
vsub.f32 s15, s15, s14
vstr.32 s15, [r3]
For Cortex-A7 with -mfpu=neon, the expected instructions are generated.
