[Bug tree-optimization/116351] RISC-V ICE: in get_len_load_store_mode, at optabs-tree.cc:664

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116351

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|15.0                        |---
            Summary|[15 regression] RISC-V ICE: |RISC-V ICE: in
                   |in get_len_load_store_mode, |get_len_load_store_mode, at
                   |at optabs-tree.cc:664       |optabs-tree.cc:664
     Ever confirmed|0                           |1
      Known to fail|                            |14.1.0
   Last reconfirmed|                            |2024-08-12
             Status|UNCONFIRMED                 |NEW

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
`-march=rv64imd_zve32x  -mrvv-vector-bits=zvl` is enough to reproduce the ICE
and it ICEs in GCC 14 also.

Note xsfvcp implies zve32x is how I figured out what options to use test GCC
14.

Confirmed.