https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116321
Bug ID: 116321
Summary: [lra][avr] internal compiler error: in
avr_out_lpm_no_lpmx, at config/avr/avr.cc:4572
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: rtl-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: gjl at gcc dot gnu.org
Target Milestone: ---
typedef __UINT64_TYPE__ uint64_t;
uint64_t fun64 (const __flash uint64_t *p)
{
return *p;
}
runs into an ICE:
$ avr-gcc lra-bug.c -S -Os -da -mlra
during RTL pass: shorten
dump file: lra-bug.c.354r.shorten
lra-bug.c: In function 'fun64':
lra-bug.c:6:1: internal compiler error: in avr_out_lpm_no_lpmx, at
config/avr/avr.cc:4572
6 | }
| ^
The respective line in avr.cc reads:
gcc_assert (REG_Z == REGNO (addr));
because the only addressing modes for AS1 __flash are REG and POST_INC of REG_Z
(reg:HI 30). However, the insn fed into the function as produced by LRA is
like found in lra-bug.c.317r.reload:
(insn 48 47 49 2 (set (reg:QI 25 r25 [+7 ])
(mem:QI (reg/f:HI 28 r28 [60]) [1 *p_2(D)+7 S1 A8 AS1]))
"lra-bug.c":6:1 86 {movqi_insn_split}
(nil))
This insn clearly violates avr.cc's REGNO_MODE_CODE_OK_FOR_BASE_P which only
allows REG_Z (regno 30) as register for non-generic address-spaces like AS1.
And avr.cc'c MODE_CODE_BASE_REG_CLASS has:
if (!ADDR_SPACE_GENERIC_P (as))
{
return POINTER_Z_REGS;
}
but reg:HI 28 in insn 48 is not an element of POINTER_Z_REGS.
Target: avr
Configured with: ../../source/gcc-master/configure --target=avr --disable-nls
--with-dwarf2 --with-gnu-as --with-gnu-ld --disable-shared
--with-long-double=64 --enable-languages=c,c++
