https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113384
John David Anglin <danglin at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Ever confirmed|0 |1
Status|UNCONFIRMED |NEW
Last reconfirmed| |2024-07-31
--- Comment #6 from John David Anglin <danglin at gcc dot gnu.org> ---
This bug was exposed by the following change:
commit d2934eb6ae92471484469d8ddd039eb34ef400b1
Author: John David Anglin <dang...@gcc.gnu.org>
Date: Thu Nov 16 17:42:26 2023 +0000
hppa: Revise REG+D address support to allow long displacements before
reload
When generating PA 2.0 code, the above change allows long immediate
displacements in integer loads and stores before reload. This indirectly
affects the RTL expansion of bb 18 and 19 of simplified test:
<bb 18> :
_13 = S.7_34 + _96;
_14 = IMAGPART_EXPR <a[_13]>;
_15 = S.7_34 + _97;
_16 = _14 - 5.0e-1;
IMAGPART_EXPR <b[_15]> = _16;
S.7_100 = S.7_34 + 1;
goto <bb 17>; [INV]
<bb 19> :
S.6_101 = S.6_33 + 1;
goto <bb 15>; [INV]
;; basic block 18, loop depth 2, maybe hot
;; prev block 17, next block 19, flags: (NEW, REACHABLE, RTL, VISITED)
;; pred: 17 (FALLTHRU)
;; 19 (DFS_BACK) dependency_58.f90:15:19
(code_label 224 203 204 18 12 (nil) [1 uses])
(note 204 224 207 18 [bb 18] NOTE_INSN_BASIC_BLOCK)
(jump_insn 207 204 208 18 (set (pc)
(if_then_else (gt (reg:SI 131 [ S.7_34 ])
(const_int 10 [0xa]))
(label_ref 227)
(pc))) "dependency_58.f90":15:19 discrim 6 30 {*pa.md:1423}
(nil)
-> 227)
;; succ: 20 dependency_58.f90:15:19
;; 19 (FALLTHRU)
;; basic block 19, loop depth 2, maybe hot
;; prev block 18, next block 20, flags: (NEW, REACHABLE, RTL, VISITED)
;; pred: 18 (FALLTHRU)
(note 208 207 209 19 [bb 19] NOTE_INSN_BASIC_BLOCK)
(insn 209 208 210 19 (set (reg:SI 108 [ _13 ])
(plus:SI (reg:SI 131 [ S.7_34 ])
(reg:SI 141 [ _96 ]))) "dependency_58.f90":15:19 discrim 5 120
{adds
i3}
(nil))
(insn 210 209 384 19 (set (reg:SI 220)
(ashift:SI (reg:SI 108 [ _13 ])
(const_int 3 [0x3]))) "dependency_58.f90":15:19 discrim 5 177
{*pa.m
d:6558}
(nil))
(insn 384 210 211 19 (set (reg:SI 261)
(plus:SI (reg/f:SI 89 sfp)
(const_int 8 [0x8]))) "dependency_58.f90":15:19 discrim 5 -1
(nil))
(insn 211 384 212 19 (set (reg/f:SI 221)
(plus:SI (reg:SI 261)
(reg:SI 220))) "dependency_58.f90":15:19 discrim 5 120 {addsi3}
(nil))
(insn 212 211 213 19 (set (reg:SF 109 [ _14 ])
(mem:SF (plus:SI (reg/f:SI 221)
(const_int 4 [0x4])) [6 a[_13]+4 S4 A32]))
"dependency_58.f90":1
5:19 discrim 5 86 {*pa.md:4440}
(nil))
(insn 213 212 214 19 (set (reg:SI 110 [ _15 ])
(plus:SI (reg:SI 131 [ S.7_34 ])
(reg:SI 142 [ _97 ]))) "dependency_58.f90":15:19 discrim 5 120
{adds
i3}
(nil))
(insn 214 213 215 19 (set (reg/f:SI 224)
(high:SI (symbol_ref/u:SI ("*.LC0") [flags 0x2])))
"dependency_58.f90":15:19 discrim 5 59 {*pa.md:2753}
(nil))
(insn 215 214 216 19 (set (reg/f:SI 223)
(lo_sum:SI (reg/f:SI 224)
(symbol_ref/u:SI ("*.LC0") [flags 0x2]))) "dependency_58.f90":15:19
discrim 5 60 {*pa.md:2785}
(expr_list:REG_EQUAL (symbol_ref/u:SI ("*.LC0") [flags 0x2])
(nil)))
(insn 216 215 217 19 (set (reg:SF 222)
(mem/u/c:SF (reg/f:SI 223) [0 S4 A32])) "dependency_58.f90":15:19
discrim 5 86 {*pa.md:4440}
(expr_list:REG_EQUAL (const_double:SF 5.0e-1 [0x0.8p+0])
(nil)))
(insn 217 216 218 19 (set (reg:SF 111 [ _16 ])
(minus:SF (reg:SF 109 [ _14 ])
(reg:SF 222))) "dependency_58.f90":15:19 discrim 5 148 {subsf3}
(nil))
(insn 218 217 219 19 (set (reg:SI 225)
(const_int 804 [0x324])) "dependency_58.f90":15:19 discrim 5 42
{*pa.md:2195}
(nil))
(insn 219 218 220 19 (set (reg:SI 226)
(plus:SI (reg:SI 110 [ _15 ])
(const_int 100 [0x64]))) "dependency_58.f90":15:19 discrim 5 120
{addsi3}
(nil))
(insn 220 219 385 19 (set (reg:SI 227)
(ashift:SI (reg:SI 226)
(const_int 3 [0x3]))) "dependency_58.f90":15:19 discrim 5 177
{*pa.md:6558}
(nil))
(insn 385 220 221 19 (set (reg:SI 262)
(plus:SI (reg/f:SI 89 sfp)
(const_int 8 [0x8]))) "dependency_58.f90":15:19 discrim 5 -1
(nil))
(insn 221 385 222 19 (set (reg/f:SI 228)
(plus:SI (reg:SI 262)
(reg:SI 227))) "dependency_58.f90":15:19 discrim 5 120 {addsi3}
(nil))
(insn 222 221 223 19 (set (mem:SF (reg/f:SI 228) [7 IMAGPART_EXPR <b[_15]>+0 S4
A32])
(reg:SF 111 [ _16 ])) "dependency_58.f90":15:19 discrim 5 86
{*pa.md:4440}
(nil))
(insn 223 222 225 19 (set (reg:SI 131 [ S.7_34 ])
(plus:SI (reg:SI 131 [ S.7_34 ])
(const_int 1 [0x1]))) "dependency_58.f90":15:19 discrim 5 120
{addsi3}
(nil))
(jump_insn 225 223 226 19 (set (pc)
(label_ref 224)) "dependency_58.f90":15:19 199 {jump}
(nil)
-> 224)
;; succ: 18 (DFS_BACK) dependency_58.f90:15:19
This gives the following assembly code:
.L12:
.loc 1 15 19 discriminator 6
cmpib,<,n 10,%r19,.L11
.loc 1 15 19 discriminator 5
add,l %r19,%r31,%r20
depw,z %r20,28,29,%r20
ldo 8(%r3),%r21
add,l %r21,%r20,%r20
fldw 4(%r20),%fr23L
add,l %r19,%r22,%r20
ldil LR'.LC0,%r21
ldo RR'.LC0(%r21),%r21
fldw 0(%r21),%fr22L
fsub,sgl %fr23L,%fr22L,%fr22L
ldo 100(%r20),%r20
depw,z %r20,28,29,%r20
ldo 8(%r3),%r21
add,l %r21,%r20,%r20
fstw %fr22L,0(%r20)
ldo 1(%r19),%r19
.loc 1 15 19
b,n .L12
.L11:
There is a problem in expanding IMAGPART_EXPR <b[_15]>+0. This insn seems
wrong:
(insn 385 220 221 19 (set (reg:SI 262)
(plus:SI (reg/f:SI 89 sfp)
(const_int 8 [0x8]))) "dependency_58.f90":15:19 discrim 5 -1
(nil))
Register reg:SI 262 becomes register r20 in assembly code. If I change
instruction "ldo 8(%r3),%r21" to "ldo 12(%r3),%r21", the simplified test
passes.
When generating PA 1.1 code, long displacements aren't allowed before
reload because long displacements are not supported for floating-point
loads and stores. This results in different code and test passes.
