https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116111
Bug ID: 116111
Summary: RISC-V: 'd' extension allowed with -mabi=ilp32e
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: patrick at rivosinc dot com
Target Milestone: ---
I noticed that LLVM disallows the 'd' extension when compiling with
-mabi=ilp32d. When I mentioned it to the LLVM folks they confirmed it was
intentional and brought up concerns about GCC's rv32id ilp32e codegen [1].
>From the PSABI (added in 2021):
> The ILP32E calling convention is not compatible with ISAs that have registers
> that require load and store alignments of more than 32 bits. In particular,
> this calling convention must not be used with the D ISA extension.
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-cc.adoc?plain=1#L449-L450
Do we want to match LLVM's behavior here and similarly disallow 'd' when using
-mabi=ilp32d?
[1] LLVM discussion: https://github.com/llvm/llvm-project/issues/100814
