[Bug target/116086] New: RISC-V: Hash mismatch with vectorized 557.xz_r at zvl128b and LMUL=m2

[rdapp at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116086

            Bug ID: 116086
           Summary: RISC-V: Hash mismatch with vectorized 557.xz_r at
                    zvl128b and LMUL=m2
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Keywords: wrong-code
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: rdapp at gcc dot gnu.org
                CC: jeremy.bennett at embecosm dot com, juzhe.zhong at rivai 
dot ai,
                    law at gcc dot gnu.org, pan2.li at intel dot com,
                    patrick at rivosinc dot com
  Target Milestone: ---
            Target: riscv

Opening a PR for tracking purposes.

For a while now I've been seeing

 Hash mismatch at 0: '82' (expected) != '90' (generated)

with 557.xz_r compiled with

-O3 -march=rv64gcv -mrvv-max-lmul=m2

It works with -O3 -march=rv64gcv or with -O3 -march=rv64gcv_zvl256b
-mrvv-max-lmul=m2.

Bisecting back to about November 23 (when we still had
--param=riscv-autovec-lmul) didn't yield any result so I'm assuming this has
always been present since we started vectorizing.

Will try to isolate a test case.