https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110040
--- Comment #2 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by jeevitha <jeevi...@gcc.gnu.org>: https://gcc.gnu.org/g:5be97039aa6c27fdf5d5bd43ef393b307c5ecedd commit r15-1895-g5be97039aa6c27fdf5d5bd43ef393b307c5ecedd Author: Jeevitha <jeevi...@linux.ibm.com> Date: Mon Jul 8 06:09:49 2024 -0500 rs6000: load high and low part of 128bit vector independently [PR110040] PR110040 exposes an issue concerning moves from vector registers to GPRs. There are two moves, one for upper 64 bits and the other for the lower 64 bits. In the problematic test case, we are only interested in storing the lower 64 bits. However, the instruction for copying the upper 64 bits is still emitted and is dead code. This patch adds a splitter that splits apart the two move instructions so that DCE can remove the dead code after splitting. 2024-07-08 Jeevitha Palanisamy <jeevi...@linux.ibm.com> gcc/ PR target/110040 * config/rs6000/vsx.md (split pattern for V1TI to DI move): New define. gcc/testsuite/ PR target/110040 * gcc.target/powerpc/pr110040-1.c: New testcase. * gcc.target/powerpc/pr110040-2.c: New testcase.
