https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115703
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Target|riscv*-*-* |
--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Note one thing is mvconst_internal should most likely also be hidden post
reload too due to the same reason:
;; Hide it from IRA register equiv recog* () to elide potential undoing of
split
But that does not seem like the cause.
The only different in asm between 14 and 15 are where a load happens.
GCC 14:
```
vsetvli zero,zero,e64,m1,ta,ma
vmul.vv v1,v1,v4
vlm.v v15,0(s1)
vsetvli zero,zero,e32,mf2,ta,ma
vredmin.vs v16,v16,v14
vsetvli zero,zero,e64,m1,ta,ma
vmul.vv v1,v1,v4
vmv1r.v v0,v15
vmul.vv v1,v1,v4
vsetivli zero,0,e32,m1,ta,ma
vmv.x.s t1,v16
vsetivli zero,4,e64,m1,ta,ma
vmul.vv v1,v1,v4
```
GCC 15:
```
vsetvli zero,zero,e64,m1,ta,ma
vmul.vv v1,v1,v4
vsetvli zero,zero,e32,mf2,ta,ma
vredmin.vs v16,v16,v14
vsetvli zero,zero,e64,m1,ta,ma
vmul.vv v1,v1,v4
vmul.vv v1,v1,v4
vsetivli zero,0,e32,m1,ta,ma
vmv.x.s t1,v16
vsetivli zero,4,e64,m1,ta,ma
vmul.vv v1,v1,v4
vlm.v v0,0(s1)
```
That is combining:
```
(insn 397 630 406 13 (set (reg:V4BI 111 v15 [517])
(mem/u/c:V4BI (reg/f:DI 9 s1 [565]) [0 S1 A8])) 3012 {*movv4bi}
(expr_list:REG_EQUAL (const_vector:V4BI [
(const_int 0 [0]) repeated x2
(const_int 1 [0x1]) repeated x2
])
(nil)))
(insn 864 862 399 13 (set (reg:V4BI 96 v0 [517])
(reg:V4BI 111 v15 [517])) 3012 {*movv4bi}
(nil))
```
Into:
```
(insn 864 862 399 13 (set (reg:V4BI 96 v0 [517])
(mem/u/c:V4BI (reg/f:DI 9 s1 [565]) [0 S1 A8])) 3012 {*movv4bi}
(nil))
```
I don't see anything wrong with this move on RTL. Maybe there is something
wrong going on the pass which is emitting the vsetivli instructions.
