https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115611
Bug ID: 115611
Summary: mve: vsetq_lane for 64-bits has wrong codegen when
setting lane 1
Product: gcc
Version: unknown
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: avieira at gcc dot gnu.org
Target Milestone: ---
When compiling:
$ cat t.s
#include <arm_mve.h>
int64x2_t fn (int64x2_t v, int64_t a)
{
return vsetq_lane_s64(a, v, 1);
}
compiled with:
$ gcc -O2 -mfloat-abi=hard -mcpu=cortex-m85 t.c -S
yields:
fn:
vmov d1, r2, r3
bx lr
The r2, r3 are pointing to an undefined register, it should have been r0, r1.
This is due to an issue with the printing operands in mve_vec_setv2di_internal.
I have a patch for this.
