https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115466

--- Comment #5 from Segher Boessenkool <segher at gcc dot gnu.org> ---
The GCC documentation says

> Note that the 'vec_ld' and 'vec_st' built-in functions always generate
> the AltiVec 'LVX' and 'STVX' instructions even if the VSX instruction
> set is available. 

(which means it explicitly does the align-down thing, the &-16 thing),
which doesn't happen with VSX insns.

This comment is a great place to add an "including address masking" thing, if I
can tempt you :-)

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