[Bug target/84790] Miscompilation for MIPS16 with -fpic and -Os or -O2

[syq at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84790

--- Comment #14 from YunQiang Su <syq at gcc dot gnu.org> ---
Ohh, sorry for my misunderstanding. Your patch is correct.

The real problem is that, $3 is used by `mips_output_function_prologue`,
which is the final for output asm source code, and thus the IRA pass
cannot be aware that $3 is used.


So we have to emit some clobbers before IRA.

We have 2 choice:

1. Your choice, aka emit clobbers just before the the call function
2. the entrance every function that need to use GP

@@ -3329,6 +3331,8 @@ mips16_gp_pseudo_reg (void)
       rtx set = gen_load_const_gp (cfun->machine->mips16_gp_pseudo_rtx);
       rtx_insn *insn = emit_insn_after (set, scan);
       INSN_LOCATION (insn) = 0;
+      emit_clobber (MIPS16_PIC_TEMP);
+      emit_clobber (MIPS_PROLOGUE_TEMP (Pmode));

       pop_topmost_sequence ();
     }