[Bug target/114801] [14/15 Regression] arm: ICE in find_cached_value, at rtx-vector-builder.cc:100 with MVE intrinsics

[jakub at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114801

--- Comment #29 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
With
--- a/gcc/config/arm/arm-mve-builtins.cc
+++ b/gcc/config/arm/arm-mve-builtins.cc
@@ -2100,7 +2100,22 @@ function_expander::add_input_operand (insn_code icode,
rtx x)
       mode = GET_MODE (x);
     }
   else if (VALID_MVE_PRED_MODE (mode))
-    x = gen_lowpart (mode, x);
+    {
+      if (CONST_INT_P (x) && (mode == V8BImode || mode == V4BImode))
+       {
+         /* In V8BI or V4BI each element has 2 or 4 bits, if those
+            bits aren't all the same, gen_lowpart might ICE.  */
+         unsigned HOST_WIDE_INT xi = UINTVAL (x);
+         if ((xi & 0x5555) != ((xi >> 1) & 0x5555)
+             || (mode == V4BImode
+                 && (xi & 0x3333) != ((xi >> 2) & 0x3333)))
+           x = force_reg (HImode, x);
+       }
+      else if (SUBREG_P (x))
+       /* gen_lowpart on a SUBREG can ICE.  */
+       x = force_reg (GET_MODE (x), x);
+      x = gen_lowpart (mode, x);
+    }

   m_ops.safe_grow (m_ops.length () + 1, true);
   create_input_operand (&m_ops.last (), x, mode);