[Bug target/111234] [13] RISC-V: ICE in vsetvl pass

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111234

--- Comment #5 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-13 branch has been updated by Kito Cheng <k...@gcc.gnu.org>:

https://gcc.gnu.org/g:129b64b0c2766d66d97be68a36f7d72685a9d29e

commit r13-8659-g129b64b0c2766d66d97be68a36f7d72685a9d29e
Author: Lehua Ding <lehua.d...@rivai.ai>
Date:   Wed Aug 30 17:48:00 2023 +0800

    RISC-V: Fix vsetvl pass ICE

    This patch fix pr111234 (a vsetvl pass ICE) when fuse a mask any
    vlmax vsetvl_vtype_change_only insn with a mu vsetvl insn.

            PR target/111234

    gcc/ChangeLog:

            * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/rvv/vsetvl/pr111234.c: New test.

    (cherry picked from commit ac55f9710fe82a4ed8cb132f57303775ce60e5d1)