[Bug target/58166] ARMv5: poor register allocation in function containing smull instruction

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58166

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
   Target Milestone|---                         |5.0
         Resolution|---                         |FIXED

--- Comment #7 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
The trunk-GCC9 produces:
```
        mov     r3, r0
        mov     r2, r1
        smull   r0, r1, r3, r2
        bx      lr
```

GCC 5.4.0-8.5.0 produces:
```
        smull   r2, r3, r0, r1
        mov     r0, r2
        mov     r1, r3
        bx      lr
```

I don't have a 4.9.x compiler around to test.

So I am going to assume this was fixed, at least in GCC 5.