https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114252
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
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CC| |rguenth at gcc dot gnu.org,
| |vmakarov at gcc dot gnu.org
--- Comment #4 from Richard Biener <rguenth at gcc dot gnu.org> ---
Yes, the missing "detail" for the middle-end is that the uint32_t is actually
4 separate byte registers. And the 'int' argument to bswap32 requires
4 registers as well.
So bswap on a value is just register shuffling, right? And thus this
libcall will never be better than doing it inline as you probably
cannot expect the incoming arguments and the outgoing return registers to be
allocated in a way so no reg-reg moves remain?
Of course since it's still SImode pseudos on RTL you might want to write
an expander that populates 4 QImode pseudos from the SImode one and
composes that back to a byte-swapped SImode one. Hoping register allocation
can then elide everything again?
I'd try to avoid using subregs if possible though using those would be easiest
I think (but you might fall foul of RA similar to -fsplit-wide-types).
Shifts and truncates/zero_extends are possibly superior. Who knows. Or
split it only after reload and have the pattern consume one scratch you
need for the register-register moves.
Hey, maybe the RA itself can know how to allocate a bswap:SI optimally
and "reload" it to be reg-reg moves ...
